Showing posts with label 8085 MICROPROCESSOR. Show all posts
Showing posts with label 8085 MICROPROCESSOR. Show all posts

Wednesday, August 21, 2013

PPT ON 8085 MICROPROCESSOR INTRODUCTION

PPT On 8085 INTRODUCTION

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Presentation Transcript:
1. 8085 INTRODUCTION
The features of INTEL 8085 are :
It is an 8 bit processor.
It is a single chip N-MOS device with 40 pins.
It has multiplexed address and data bus.(AD0-AD7).
It works on 5 Volt dc power supply.
The maximum clock frequency is 3 MHz while minimum frequency is 500kHz.
It provides 74 instructions with 5 different addressing modes. 

2. It provides 16 address lines so it can access 2^16 =64K bytes of memory.
It generates 8 bit I/O address so it can access 2^8=256 input ports.
It provides 5 hardware interrupts:TRAP, RST 5.5, RST 6.5, RST 7.5,INTR.
It provides Acc ,one flag register ,6 general purpose registers and two special purpose registers(SP,PC).
It provides serial lines SID ,SOD.So serial peripherals can be interfaced with 8085 directly.

3. 8085 PIN DESCRIPTION
Some important pins are :
AD0-AD7: Multiplexed Address and data lines. 
A8-A15: Tri-stated higher order address lines.
ALE: Address latch enable is an output signal.It goes high when operation is started by processor .
S0,S1: These are the status signals used to indicate type of operation. 
RD¯: Read is active low input signal used to read data from I/O device or memory.
WR¯:Write is an active low output signal used write data on memory or an I/O device.

4. 8085 PIN DESCRIPTION
READY:This an output signal used to check the status of output device.If it is low, µP will WAIT until it is high.
TRAP:It is an Edge triggered highest priority , non mask able interrupt. After TRAP, restart occurs and execution starts from address 0024H. 
RST5.5,6.5,7.5:These are maskable interrupts and have low priority than TRAP.
INTR¯&INTA:INTR is a interrupt request signal after which µP generates INTA or interrupt acknowledge signal.
IO/M¯:This is output pin or signal used to indicate whether 8085 is working in I/O mode(IO/M¯=1) or Memory mode(IO/M¯=0 ).

5. HOLD&HLDA:HOLD is an input signal .When µP receives HOLD signal it completes current machine cycle and stops executing next instruction.In response to HOLD µP generates HLDA that is HOLD Acknowledge signal.
RESET IN¯:This is input signal.When RESET IN¯ is low µp restarts and starts executing from location 0000H.
SID: Serial input data is input pin used to accept serial 1 bit data .
X1X2 :These are clock input signals and are connected to external LC,or RC circuit.These are divide by two so if 6 MHz is connected to X1X2, the operating frequency becomes 3 MHz.
VCC&VSS:Power supply VCC=+ -5Volt& VSS=-GND reference.

6. Arithmetic and Logical group 
Accumulator: It is 8 bit general purpose register.
It is connected to ALU. 
So most of the operations are done in Acc.
Temporary register: It is not available for user
All the arithmetic and logical operations are done in the temporary register but user can’t access it.
Flag: It is a group of 5 flip flops used to know status of various operations done.
The Flag Register along with Accumulator is called PSW
or Program Status Word.

7. Register Group
Temporary registers (W,Z):These are not available for user. These are loaded only when there is an operation being performed.
General purpose:There are six general purpose registers in 8085 namely B,C,D,E,H,L.These are used for various data manipulations.
Special purpose :There are two special purpose registers in 8085:
SP :Stack Pointer.
PC:Program Counter.

8. Register Group
Stack Pointer: This is a temporary storage memory 16 bit register. Since there are only 6 general purpose registers, there is a need to reuse them . 
Whenever stack is to be used previous values are PUSHED on stack and then after the program is over these values are POPED back.
Program Counter: It is 16 bit register used to point the location from which the next instruction is to be fetched.
When a single byte instruction is executed PC is automatically incremented by 1.
Upon reset PC contents are set to 0000H and next instruction is fetched onwards.

9. Memory interfacing
There needs to be a lot of interaction between the microprocessor and the memory for the exchange of information during program execution.
Memory has its requirements on control signals and their timing.
The microprocessor has its requirements as well.

The interfacing operation is simply the matching of these requirements.

10. For more info please refer our PPT.
Thanks.

Source: Power Point Presentations

PPT ON 8085 MICROPROCESSOR ARCHITECTURE

PPT On 8085 Microprocessor Architecture

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Presentation Transcript:
1. The 8085 Microprocessor Architecture

2. The 8085 and Its Busses
The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory. 
It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.
The pins on the chip can be grouped into 4 groups:
Address Bus.
Data Bus.
Control and Status Signals.
Power supply and frequency.

3. The Address and Data Busses
The address bus has 8 signal lines A8 – A15 which are unidirectional.
The other 8 address bits are multiplexed (time shared) with the 8 data bits.
So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time.
During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.
In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.

4. The Control and Status Signals
There are 4 main control and status signals. These are:
ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines.
RD: Read. Active low.
WR: Write. Active low.
IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1).
S1 and S0 : Status signals to specify the kind of operation being performed .Usually un-used in small systems.

5. Cycles and States 
From the above discussion, we can define terms that will become handy later on:
T- State: One subdivision of an operation. A T-state lasts for one clock period.
An instruction’s execution length is usually measured in a number of T-states. (clock cycles). 
Machine Cycle: The time required to complete one operation of accessing memory, I/O, or acknowledging an external request.
This cycle may consist of 3 to 6 T-states.
Instruction Cycle: The time required to complete the execution of an instruction.
In the 8085, an instruction cycle may consist of 1 to 6 machine cycles.

6. A closer look at the 8085 Architecture
Previously we discussed the 8085 from a programmer’s perspective. 

Now, lets look at some of its features with more detail.

7. The ALU
In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation.

Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer.

8. The Flags register
There is also the flags register whose bits are affected by the arithmetic & logic operations.
S-sign flag
The sign flag is set if bit D7 of the accumulator is set after an arithmetic or logic operation.
Z-zero flag
Set if the result of the ALU operation is 0. Otherwise is reset. This flag is affected by operations on the accumulator as well as other registers. (DCR B).
AC-Auxiliary Carry
This flag is set when a carry is generated from bit D3 and passed to D4 . This flag is used only internally for BCD operations. (Section 10.5 describes BCD addition including the DAA instruction).
P-Parity flag
After an ALU operation if the result has an even # of 1’s the p-flag is set. Otherwise it is cleared. So, the flag can be used to indicate even parity.
CY-carry flag
Discussed earlier

9. Memory interfacing
There needs to be a lot of interaction between the microprocessor and the memory for the exchange of information during program execution.
Memory has its requirements on control signals and their timing.
The microprocessor has its requirements as well.
The interfacing operation is simply the matching of these requirements.

10. For more info. please refer our PPT.
Thanks.

Source: Power Point Presentations